For forming Complementary Metal Oxide Semiconductor (CMOS) devices, MOSFET (Metal Oxide Semiconductor Field Effect Transistor) devices or high memory devices, such as DRAMs (Dynamic Random Access Memories), it is often necessary to form a thin, high dielectric constant (high-k) coating onto a substrate, such as a silicon wafer. A variety of techniques have been developed to form such thin films on a semiconductor wafer.
In the past, gate dielectric layers have been formed from silicon dioxide. The scaling down of the above-described devices, however, has increased the demand for gate dielectrics with a higher dielectric constant than silicon dioxide. This is necessary to reach ultra thin oxide equivalent thickness (less than 20 xc3x85) without compromising gate leakage current. In one embodiment, those skilled in the art have explored the possibility of using a nitride layer in place of traditional silicon dioxide layers.
For instance, in one conventional method of forming a dielectric film, an oxynitride layer is first formed on the substrate and then annealed in an oxygen-containing or inert atmosphere to produce the dielectric layer. For example, one such conventional method is described in U.S. Pat. No. 5,880,040 to Sun, et al. In particular, Sun, et al. describes a method for manufacturing a dielectric layer that includes exposing the heated surface of a silicon substrate to N2O to cause the growth of a layer of SiO2 on the surface, which incorporates a concentration of nitrogen in the layer. Next, the layer is heated and exposed to NO to cause formation of silicon-to-nitrogen bonds in an interfacial region between the layer of SiO2 and the silicon substrate. The layer is then annealed in the presence of an inert gas, such as nitrogen.
Although this method may possess some benefits, the dielectric constant xe2x80x9ckxe2x80x9d of the resulting film is often not large enough for certain applications due to the relatively low nitrogen content therein.
Additional methods have also been developed. For instance, another conventional method known as a gate stack involves the formation of a dielectric film in which a base oxide layer is formed on the silicon substrate followed by the deposition of a gate dielectric and subsequently by a gate contact material. One problem which has been identified for the gate stack is the projected oxide thicknesses of less than 2 nm for the 100 nm technology node and less than 1 nm for the 50 nm node. Conventional silicon dioxide is believed not to be scaleable to such dimensions with acceptable gate leakage due to tunneling currents. Projected tunneling currents for silicon dioxide at such thickness ranges is expected to be several orders of magnitude too large. Materials with high dielectric constants are needed to achieve reduced tunneling currents.
As such, a need currently exists for improved methods of depositing a high-k coating onto a substrate.
In accordance with one embodiment of the present invention, a method for depositing a dielectric coating onto a substrate is provided that includes a system comprising a reactor vessel adapted to contain the substrate and an energy source in communication with the reactor vessel for heating the substrate. For example, in one embodiment, the substrate can be a semiconductor wafer.
While in the reactor vessel, a nitride film having a dielectric constant greater than about 4 can be formed on the substrate. For example, one method for forming the film can include the following:
a) heating the substrate to an oxide deposition temperature with the energy source.
b) supplying to the reactor vessel an oxide gas while the substrate is at the oxide deposition temperature. The oxide gas comprises a compound that contains at least one nitrogen atom such that the oxide gas reacts with the substrate to form an oxynitride layer on the substrate. For example, in some embodiments, the nitrogen-containing compound is selected from the group consisting of NO, N2O, NO2, and combinations thereof.
c) depositing a nitride layer on the oxynitride layer while the substrate is maintained at a nitride deposition temperature. For example, in some embodiments, the nitride layer can be deposited by supplying a first gas precursor and a second gas precursor to the reactor vessel. In some embodiments, the first gas precursor comprises a compound that contains at least one silicon atom (e.g., SiH4, SiH3, SiH2Cl2, etc.) and the second gas precursor comprises a compound that contains at least one nitrogen atom (e.g., NH3, N2O, etc.).
The method of forming the film can also include annealing the nitride layer in the presence of a nitridation annealing gas (e.g. NH3), as well as annealing the nitride layer in the presence of an oxide annealing gas (e.g. N2O).
In one embodiment, in order to minimize surface roughness of the formed layer, the oxynitride layer can be formed so as to have a thickness of less than 10 angstroms.
Further, the nitride layer can be deposited at a temperature of less than about 750xc2x0 C., while the nitride layer can then be annealed in the presence of an oxide annealing gas at a temperature greater than 770xc2x0 C. The formed nitride layer can have a thickness of less than about 25 angstroms.
In order to form a thin oxynitride layer prior to nitride deposition, the oxynitride layer can be formed in an atmosphere having a pressure less than about 50 Torr, and particularly less than about 25 Torr.
As described above, besides annealing the nitride layer in the presence of an oxide annealing gas, the nitride layer is also annealed in the presence of a nitridation annealing gas. When annealed in the presence of a nitridation annealing gas, the temperature can be from about 875xc2x0 C. to about 925xc2x0 C.
The nitride layer can be used in various devices. For instance, the nitride layer can be incorporated into a capacitor or into a transistor.
In an alternative embodiment, instead of forming a nitride layer, the present invention is directed to forming a metal oxide or silicate layer on a semiconductor wafer. In this embodiment, the method of the present invention includes heating a wafer comprising silica in the presence of a gas containing nitrogen to form a passivation layer on the wafer. The gas containing nitrogen can be ammonia. The passivation layer can have a thickness of less than about 5 nanometers, and particularly less than 1 nanometer. The passivation layer can be formed in less than about 10 seconds at a temperature from about 600 to about 900xc2x0 C. The partial pressure of the gas containing nitrogen during formation of the passivation layer can be less than about 100 Torr.
In accordance with the present invention, the passivation layer is formed in order to prevent later formation of oxide layers.
After forming the passivation layer, the wafer can be heated in the presence of a gas precursor to form a dielectric layer comprising a metal oxide or a silicate. The dielectric layer can be formed at a temperature greater than about 300xc2x0 C., and particularly at a temperature of from about 400xc2x0 C. to about 800xc2x0 C. The gas precursor can have a partial pressure of less than about 100 Torr during formation of the dielectric layer. The dielectric layer can be, for instance, HfO2, ZrO2, Al2O3, Ta2O5, La2O5 or their silicates.
After forming the dielectric layer, the wafer can be annealed in the presence of an annealing gas. The annealing gas can include an inert gas and an oxygen-containing gas. The annealing gas can be, for instance, nitrogen, argon, or mixtures thereof. The oxygen-containing gas, on the other hand, can be NO, N2O, O2, or mixtures thereof.
Once formed, the dielectric layer can have an EOT of less than 1.2 nanometers. The dielectric layer can be used in various devices. In one embodiment, a polysilicon layer can then be deposited on top of the dielectric layer.
All of the processes of the present invention can be carried out in a rapid thermal processing chamber in which the wafer is heated rapidly to high temperatures. All of the layers can be formed during separate heating cycles as desired.
Other features and aspects of the present invention are discussed in greater detail below.